1. Field of the Invention
The present invention relates to a device for automatically designing a semiconductor integrated circuit which receives a circuit made by using cells provided in a cell library and performs automatic placement and routing of the cells to design the integrated circuit.
2. Description of the Background Art
FIG. 14 is a block diagram of a conventional device for automatically designing a semiconductor integrated circuit. In FIG. 14, the reference numeral 1 designates a cell library storage for storing data indicative of cells including logic gates such as NAND gates, inverters and the like; 2 designates a circuit storage for representing a circuit desired to be achieved by connection between cells; 3 designates a circuit verifier for simulating a circuit operation to verify it; 4 designates a placement and routing unit for positioning respective cells and interconnecting lines between the cells on an integrated circuit chip; and 5 designates a layout storage for storing information about the positions of the cells and interconnecting lines.
In operation, pre-designed cell data are stored in the cell library storage 1, and data about the circuit desired to be achieved in the form of an integrated circuit are stored in the circuit storage 2. This circuit is required to have only the cells connected to each other and included in the cell library storage 1. The circuit verifier 3 verifies whether or not the circuit stored in the circuit storage 2 operates correctly by means of the respective data of the cell library storage 1 and circuit storage 2. If the correctness of the circuit becomes clear as a result of the verification, the placement and routing unit 4 determines the positions of the respective cells and interconnecting lines on the integrated circuit chip by means of the circuit data to output the resultant information to the layout storage 5.
The conventional device for automatically designing a semiconductor integrated circuit as above constructed is difficult to attain required target values of the area, operating speed and power consumption of the designed integrated circuit in some cases. One of the reasons for the difficulty is that a circuit most adapted for the desired function is not necessarily provided because the data of the cells for use in the circuit are restricted to those provided in the cell library storage 1. Furthermore, long interconnecting lines for some connections as a result of the placement and routing result in substantial area, a long signal propagation time and large power consumption of the lines.